Tenstorrent

Advanced Packaging Process Engineer

Santa Clara, California, United States; 新北市, New Taipei City, Taiwan · Packaging

AI/ML Physical Design Flow Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

AI Performance Simulation Architect

United States · Performance Model

Analog Design Engineer

North America · Mixed Signal Design

Associate, Corporate Development

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Operations

Automotive and Robotics SOC Architect

United States · Automotive Architecture

Business Development Lead, India

Bengaluru, Karnataka, India · Experience

Chiplet Physical Design Engineer

United States · Architecture

C++ Machine Learning Engineer, AI Models Training

Santa Clara, California, United States · AI Software

C++ Machine Learning Engineer, Models Training

Gdańsk, Pomeranian Voivodeship, Poland; Warszawa, Masovian Voivodeship, Poland · AI Software

(Contractor) HR Project Manager, People Programs

Santa Clara, California, United States · Human Resources

CPU Architect, Load-Store

United States · Performance Model

CPU Core Design Verification Testbench Lead

Austin, Texas, United States; Santa Clara, California, United States · RISC V

CPU Core Design Verification Test Generator Lead

Austin, Texas, United States; Santa Clara, California, United States · RISC V

CPU Verification Fellow, RISC-V High-Performance Processor

United States · Design Verification

Design Verification Lead, AI Hardware

Toronto, Ontario, Canada · AI Hardware

DFT Engineer, Automotive Robotics

Munich, Germany · Automotive

Director of Customer Engineering

Toronto, Ontario, Canada · AI Hardware

Director, Systems & Solutions

Austin, Texas, United States; North America; Santa Clara, California, United States; Toronto, Ontario, Canada · Systems Engineering

Emulation Engineer, Automotive Robotics

Munich, Germany · Automotive

Engineering Program Manager, RISCV

Austin, Texas, United States · RISC V

Engineer, PCIe Validation

Vancouver, British Columbia, Canada · Si Val / Qual

Engineer, SoC Infrastructure

Santa Clara, California, United States · SoC

Experienced Technical Recruiter

Belgrade, Serbia · Recruiting

Fabric SOC Architect

United States · Architecture

Field Applications Engineer, IP Product

Austin, Texas, United States; Fort Collins, Colorado, United States; Raleigh, North Carolina, United States; Santa Clara, California, United States; Toronto, Ontario, Canada; Vancouver, British Columbia, Canada · IP Product Eng

Full-Chip Physical Design Verification Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

GCC Compiler Engineer

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Runtime

Global Supply Chain Manager

新北市, New Taipei City, Taiwan · Supply Chain

HR Project Manager, People Programs - Contractor

Austin, Texas, United States; Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Human Resources

India Site Lead

Bengaluru, Karnataka, India · RISC V

Infrastructure and Platform Development Engineer

Austin, Texas, United States; Gdańsk, Pomeranian Voivodeship, Poland; Santa Clara, California, United States; Toronto, Ontario, Canada; Warszawa, Masovian Voivodeship, Poland · AI Software

Interconnect and Compute Architect

United States · Architecture

Inventory Manager, Supply Chain

Toronto, Ontario, Canada · Supply Chain

Machine Learning Engineer, AI Models

Cyprus · ML Models

Manager, Finance Center of Excellence (COE)

Bengaluru, Karnataka, India · Finance

Manager, Silicon Supplier Quality

新北市, New Taipei City, Taiwan · Supply Chain

Memory Architect

North America · Architecture

Munich Site Manager

Munich, Germany · Automotive

PDK/CAD Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Mixed Signal Design

Performance Architect, AI HW

Toronto, Ontario, Canada · Tensix

Physical Design Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Physical Design

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

United States · Mixed Signal Design

Physical Design Engineer, PnR

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Physical Design Engineer - STA

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Power Architect

Toronto, Ontario, Canada · Tensix

Power Design Engineer

Tokyo, Japan · Architecture

Recruiter, Business Operations

United States · Recruiting

Regional Sales Lead, Singapore

Singapore · Experience

RISC-V AI / HPC & Agentic Software Engineer

新北市, New Taipei City, Taiwan · Architecture

RISC-V AI / HPC & Agentic Software Engineering Lead

North America · Architecture

Risc-V Architect

Toronto, Ontario, Canada · Tensix

RISC-V CPU Microarchitecture / RTL

United States · CPU

Senior DFT Engineer, Architecture

Tokyo, Japan · Architecture

Senior Embedded Engineer, AI IP

Toronto, Ontario, Canada · IP Software

Senior Engineer, System-Level Design Verification

Toronto, Ontario, Canada · AI Hardware

Senior Physical Design Engineer

Tokyo, Japan · Architecture

Senior Tax Manager

United States · Finance

Signal Integrity Engineer

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Silicon and Systems

Silicon Power & Characterization Lead

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Si Val / Qual

Site Reliability Engineer, Metal

Toronto, Ontario, Canada · AI Software

SOC Architect - Chiplet

Munich, Germany · Automotive

SoC - Chiplet Design Lead

Toronto, Ontario, Canada · SoC

SoC Debug and Trace Architect

Toronto, Ontario, Canada · DC Deployment

SOC Emulation Engineer - Hardware Emulation Infrastructure

Austin, Texas, United States; Santa Clara, California, United States · SoC

SoC Physical Design Verification Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Physical Design

Software Architect, Automotive Robotics

Munich, Germany · Automotive

Software Engineer, AI Compiler

Austin, Texas, United States · AI Compiler

Software Engineer-AI Model Bring Up

Tokyo, Japan · ML Models

Software Engineer, Kernel Development and Optimization

Gdańsk, Pomeranian Voivodeship, Poland; Warszawa, Masovian Voivodeship, Poland · OPs

Software Engineer, Metal Runtime (API & Abstractions)

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Runtime

Software Engineer, Metal Runtime (Core Systems)

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Runtime

Software Engineer, Scale Out

Toronto, Ontario, Canada · Scale Out

Software Engineer, TT-Distributed

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Scale Out

Sr Engineer, AI Kernel

Austin, Texas, United States; Toronto, Ontario, Canada · AI Hardware

Sr. Engineer, CPU RTL Design

Austin, Texas, United States; Santa Clara, California, United States · RISC V

Sr. Engineer, Ethernet IP

Santa Clara, California, United States; Vancouver, British Columbia, Canada · Si Val / Qual

Sr. Engineer, Kernel Development and Optimization

Belgrade, Serbia · OPs

Sr. Engineer, Performance Infrastructure

Austin, Texas, United States · RISC V

Sr. Engineer, RTL Implementation

Austin, Texas, United States; Santa Clara, California, United States · RISC V

Sr Engineer, Server Inference

Belgrade, Serbia · Product Software Engineering

Sr. Engineer, SoC Design Verification

Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · SoC

Sr. Engineer, Software - AI Compiler

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · AI Compiler

Sr. Engineer, Software - AI Compiler

Belgrade, Serbia · AI Compiler

Sr. Engineer/Staff Engineer, Design Verification,System IP

Bengaluru, Karnataka, India · RISC V

Sr. IP Product Engineer, AI Processor

Toronto, Ontario, Canada; Vancouver, British Columbia, Canada · IP Product Eng

Sr. Manager, Global People Operations

Santa Clara, California, United States · Human Resources

Sr. Software Engineer, AI Compiler

Toronto, Ontario, Canada · AI Compiler

Sr.Staff, Design Verification - CPU Cluster / SoC

Bengaluru, Karnataka, India · RISC V

Sr. Staff Design Verification Engineer, Automotive Robotics

Munich, Germany · Automotive

Sr. Staff Engineer, Driver

Belgrade, Serbia · AI Software

Sr. Staff Engineer, RISC-V Software Workload Enablement

Australia; United States · RISC V

Sr Staff Engineer, SoC RTL Design

Toronto, Ontario, Canada · Digital Design

Staff Cost & Inventory Specialist, Finance

Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Finance

Staff, Design for Test Engineer (DFT)

Bengaluru, Karnataka, India · Silicon

Staff Engineer, CPU Architectural Verification

Austin, Texas, United States; Santa Clara, California, United States · RISC V

Staff Engineer, CPU Core Verification

Bengaluru, Karnataka, India · RISC V

Staff Engineer, Emulation Technical Lead

Austin, Texas, United States · RISC V

Staff Engineer, Physical Design

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Staff Engineer, SoC RTL Engineer

Tokyo, Japan · Architecture

Staff Engineer, Software Release and Packaging - RISC V

Australia; Canada; United States · RISC V

Staff Field Application Engineer

Austin, Texas, United States; Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada · Experience

Staff Firmware Engineer

Toronto, Ontario, Canada · Systems SW

Staff Infrastructure Engineer - Models

Belgrade, Serbia · Product SWE - Models Infrastructure

Staff Mixed Signal Design Engineer, Silicon Validation

Santa Clara, California, United States; Toronto, Ontario, Canada · IP Product

Staff Physical Design Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Physical Design

Staff, RTL Engineer

United States; 新北市, New Taipei City, Taiwan · Security

Staff Technical Program Manager

Belgrade, Serbia · Product SWE - TPM

Staff Technical Program Manager, AI Systems and IP Delivery

North America · AI Hardware

Staff Technical Program Manager, Physical Design

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Static Timing Analysis (STA) Methodology Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Support Engineer - AI Server Systems

Tokyo, Japan · Customer Success

System IP RTL Design Lead

Bengaluru, Karnataka, India · RISC V

System Management Tools Engineer

Toronto, Ontario, Canada · Systems SW

Technical Program Manager, Architecture

Santa Clara, California, United States · Architecture TPM

Tech Recruiter - Contractor

Austin, Texas, United States · Recruiting

Top Level Physical Design Engineer

Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · Advanced Physical Design

Verification Engineer

Japan · Architecture